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GitHub
6 天
uart-verilog
This project implements a UART-controlled processing unit with dual clock domains for UART communication and datapath operations. A state machine decodes serial commands to control the datapath, ...
eeworld.com.cn
12 小时
USB转JTAG+UART下载器
USB-JTAG调试器可以在Windows和Linux免驱动使用,用来调试FPGA,C906等设备。 本品是基于Sipeed开源项目所制作的USB-JTAG转换器,通过模拟FT2232协议实现USB转JTAG+TTL,用来调试FPGA,C906等设备。亦或者是双串口,预留蓝牙链路,支持二次开发,同时通过Apache License 2.0 开放 ...
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